1. Field of the Invention
Embodiments of the present invention relate to processors and microprocessors. More specifically, embodiments of the present invention relate to exception handling.
2. Related Art
At some point during execution of a code sequence (a stream of instructions or micro-instructions) by a processor or microprocessor, an event may be identified. The event can be internal or external to the processor or microprocessor. External events are also referred to as “interrupts” and internal events are also referred to as “traps.”
According to the prior art, a trap is conventionally handled immediately by an exception handler that usually resides as software in main memory. This can be problematic if the event occurs at a time when a system is not prepared to handle it.